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Circuits & Electronics · Lecture 5 of 26 · 51:07

Lecture 5: Inside the Digital Gate

Lec 5 | MIT 6.002 Circuits and Electronics, Spring 2007 on YouTube

Study guide

What this lecture covers

The previous lecture defined digital gates as abstract devices, a NAND gate here, an AND gate there, that satisfy the static discipline. This lecture answers what is actually inside those little circle-and-line symbols: how do you build a gate out of physical components? It starts with a fluid analogy (taps controlling water flow), moves to switches controlling a bulb, and then builds an inverter, a NAND gate, and a NOR gate out of an idealized switch and a resistor.

The lecture then introduces the MOSFET as the physical device that behaves like that idealized switch, shows its switch model (an open or short circuit depending on the gate-source voltage relative to a threshold), and verifies that a MOSFET-based inverter's input/output curve actually satisfies the voltage thresholds of the static discipline.

Key ideas

  • Fluid analogy: taps in series only let water through when both are open (AND-like behavior); taps in parallel let water through when either is open (OR-like behavior).
  • Idealized switch: a three-terminal abstract device with a control input; when the control is 0 the switch is an open circuit, when the control is 1 it is a short circuit.
  • Resistor-plus-switch pattern: a voltage source through a resistor into a switch to ground is called out as one of the most common patterns in the course; when the switch is open the output is high, when closed the output is low, an inverter.
  • Building NAND and NOR from switches: two switches in series to ground (with a pull-up resistor) give a NAND gate; two switches in parallel give a NOR gate, matching the inputs' AND-like or OR-like conducting conditions.
  • Why NAND/NOR are the natural primitives: this switch-and-resistor pattern always produces an inverted output, so NAND and NOR gates are simpler to build directly than AND and OR gates, which require adding an inverter afterward.
  • MOSFET (metal-oxide semiconductor field-effect transistor): a physical three-terminal device with gate, drain and source terminals; in 6.002's simple model, the gate draws no current (iG = 0).
  • Switch model of the MOSFET: if vGS (gate-to-source voltage) is at or above a threshold voltage VT, the MOSFET behaves like a short circuit between drain and source; if vGS is below VT, it behaves like an open circuit.
  • Verifying the static discipline: the input/output voltage curve of a MOSFET-based inverter is checked against sample thresholds (VOL, VOH, VIL, VIH) to confirm it produces valid high and low outputs for valid high and low inputs.

Walkthrough

Review and combinational gate properties (0:25)

The lecture reviews the static discipline and the NAND gate's truth table (output is high unless both inputs are high), and restates that combinational gates must satisfy the static discipline and produce outputs that are a function of inputs alone, with no memory of history. A three-gate example circuit (two NAND gates and an inverter) is analyzed with Boolean algebra, and the lecture notes that a Pentium IV contains on the order of 20 million gates, motivating why abstraction is needed to manage that complexity.

Building intuition with fluids and switches (13:59)

Before building a real gate, the lecture uses a fluid analogy: two taps in series only pass water when both are open, resembling an AND gate; two taps in parallel pass water when either is open, resembling an OR gate. It then translates this to electricity using an idealized switch, showing that a bulb lit by two switches in series only turns on when both switches are closed.

An idealized switch model and building an inverter (19:13)

The lecture defines an abstract three-terminal switch: open circuit when its control is 0, short circuit when its control is 1. Combining this switch with a pull-up resistor and a voltage source, it analyzes the output: when the control is 0 the switch is open and the output equals the supply voltage (a high); when the control is 1 the switch shorts the output to ground (a low). This behavior matches an inverter, so the simplest possible switch circuit builds an inverter.

Building NAND and NOR gates from switches (32:30)

Extending the pattern, two switches in series (both must be off for the output to be high, either on drives the output low, matching a NAND truth table) build a NAND gate, and two switches in parallel build a NOR gate. The lecture explains that this switch-and-resistor topology always inverts, which is why NAND and NOR, not AND and OR, are the natural building-block gates; an AND or OR gate is built by adding an inverter after a NAND or NOR.

The MOSFET as a physical switch (37:47)

The lecture introduces the MOSFET, with gate, drain, and source terminals, as the physical device that realizes the idealized switch, noting that in the course's simple model the gate current is always zero. Its switch model is given: when vGS is at or above threshold voltage VT, drain and source behave as shorted; when vGS is below VT, they behave as open. A demo plots the device's iDS versus vDS curve on an oscilloscope, showing it snap between the open-circuit and short-circuit characteristics as vGS is adjusted around VT.

Verifying the inverter against the static discipline (47:05)

Replacing the idealized switch with a MOSFET in the earlier inverter circuit, the lecture derives the input/output voltage curve: for input voltage below VT the output stays at the supply voltage, and once input crosses VT the output drops to near zero. Checking this curve against sample thresholds (VOL = 0.5V, VOH = 4.5V, VIL = 0.9V, VIH = 4.1V) confirms that the MOSFET inverter's outputs and inputs both satisfy the static discipline, meaning the device is a valid building block for larger digital systems.

Before you watch

  • Watch Lecture 4 first, since this lecture assumes familiarity with the static discipline, noise margins, and the NAND gate truth table introduced there.
  • Recognizing series and parallel resistor patterns, covered in Lectures 2 and 3, helps when analyzing the switch-and-resistor circuits used to build gates.

Check your understanding

  1. How does the fluid analogy with taps in series versus parallel map onto AND-like and OR-like logic behavior?
  2. Why does connecting a resistor and a single idealized switch to ground produce an inverter rather than a simple pass-through?
  3. Why are NAND and NOR gates typically the simplest primitives to build from switches, requiring AND and OR to be constructed by adding an inverter?
  4. According to the MOSFET's switch model, what determines whether the device behaves as an open circuit or a short circuit between drain and source?
  5. How does the lecture use the four thresholds VOL, VOH, VIL, and VIH to confirm that the MOSFET-based inverter satisfies the static discipline?

Chapters

From the YouTube description

Inside the digital gate
View the complete course: http://ocw.mit.edu/6-002S07

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